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Title:
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Emitter Optimization on a-Si:H/c-Si Heterojunction Solar Cells for Isotextured Wafers
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Author(s):
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Schuettauf, J.W.A.; Komatsu, Y.; Geerligs, L.J.; Mai, Y.; Bink, A.; Spee, D.A.; Schropp, R.E.I.
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Published by:
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Publication date:
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ECN
Solar Energy
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8-9-2008
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ECN report number:
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Document type:
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ECN-M--08-059
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Conference Paper
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Number of pages:
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Full text:
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4
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Download PDF
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Presented at: 23rd European Photovoltaic Solar Energy Conference and Exhibition, Valencia, Spain, 1-5 september 2008.
Abstract:
In this work we report on the emitter optimization on isotextured n-type FZ c-Si wafers for a-Si:H/c-Si heterojunction solar cells. At ECN, three different types of isotexturing have been developed. From lifetime measurements performed on passivated isotextured wafers, it was concluded that two of the three types of texturing are compatible with our silicon heterojunction process. The next step was to optimize the heterojunction emitter on the isotextured wafers. The emitter structure, consisting of a thin intrinsic layer and a p-layer has been deposited in a medium sized area (30 cm x 40 cm) PILOT reactor by means of 13.56 MHz RF PECVD. As a p-layer, we found that an a-Si:H p-layer with a thickness of around 20 nm gave the best results. Finally, we performed a thickness series of an already optimized i-layer for the isotextured wafers. We found that the optimal i-layer thickness on these isotextured wafers (10 nm) is higher than on flat polished wafers (7 nm). The newly optimized structure finally led to an efficiency of 16.4% with a VOC of 623 mV, a JSC of 34.2 mA/cm2 and a FF of 77%. An important next step in our research will be to extend the results shown in this paper to isotextured mc-Si wafers.
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